Hardware Verification Engineer

Job Title: Hardware Verification Engineer

Industry: Semiconductors / Embedded Systems / SoC Design

Job Summary:
We are seeking a skilled Hardware Verification Engineer with hands-on expertise in IP and SoC-level verification. The ideal candidate will have experience in developing verification environments, integrating VIPs, creating UVM testbenches, and executing coverage-driven regressions for various digital IPs and subsystems.

Key Responsibilities:

• Lead verification of Match-Action Pipeline and UART/IPs with staged customer deliveries.

• Drive bring-up, test planning, and execution for UART, I3C, I2C, and Ethernet peripherals.

• Develop reusable APB protocol verification environments.

• Integrate commercial Ethernet VIPs at block and chip levels (800G/400G/100G).

• Create and execute UVM sequences for PCIe/CXL traffic generation and validation.

• Configure and verify I3C chiplet and HUB chiplet communications with processor cores.

• Validate NIC400 infrastructure and system address mapping for SoC flows.

• Perform Control/Status Register (CSR) verification for Ethernet chiplets.

• Drive coverage closure (line, toggle, FSM) and establish regression setups.

• Automate Register Abstraction Layer (RAL) flows for efficient verification.

Preferred Skills:

• Strong command of UVM methodology and SystemVerilog.

• Experience with industry-standard VIPs and simulators.

• Deep understanding of AMBA protocols (APB, AXI), Ethernet, PCIe, I3C.

• Familiarity with chiplet-based architecture and IP integration.

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